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HARDWARE CONFIGURATOR.Razer DeathAdder Essential | RZ Support
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Chipidea specialists were able to reduce the power consumption of USB PHY
In terms of high-level concepts, such as “USB interface”, you don’t have to think about the fact that the features of a low-level technical implementation can affect the characteristics of the device as a whole. Meanwhile, improvements in the physical layer interface (PHY) architecture, for example, in the case of the aforementioned USB interface, helped Chipidea specialists to create a product that has the lowest power consumption in its category.
This is a new generation of USB physical layer interface architecture designed for use in I / O devices that are designed for supply voltages of 1.8 V and integration into SoC systems, manufactured according to the norms of 65 and 45 nm.
According to Chipidea, the power consumption of the new product does not exceed 70 mW. The 1.8 V supply voltage was used in such devices for the first time in the industry – by the way, the Chipidea range includes I / O blocks for the USB interface, designed for 3.3 and 2.5 V.
The new design is fully compliant with the USB 2 specification.0, has protection against short-term short circuit, provides the possibility of programmable setting. The product is available as a separate PHY or paired with a USB controller.